Vayavya Labs has partnered with Tenstorrent to accelerate hardware and software development for RISC-V-based processors and systems through virtual platform modelling.
Vayavya Labs, a Silicon-to-Systems technology solutions provider specialising in hardware-software interface tools, electronic control unit (ECU) virtualisation and SystemC-based virtual prototyping, is serving as a virtual platform partner to Tenstorrent, an AI computing company developing RISC-V-based processors and systems.
Since 2024, Vayavya Labs has developed and delivered SystemC/Transaction-Level Modelling (TLM) virtual platforms for several subsystems within Tenstorrent’s intellectual property (IP) portfolio. These include security enclave processor (SEP) register complexes, system management controller (SMC) logic, direct memory access (DMA) engines with secure zeroing capabilities, boot and fuse infrastructure, and a hardware security module designed to support cryptographic operations.
The virtual platforms enable Tenstorrent’s software development and validation teams to develop, test and debug software using virtual representations of the hardware before physical silicon becomes available. This approach helps teams identify potential integration issues earlier in the development cycle, supporting more efficient hardware-software development and validation.
Vayavya Labs built the models on CSML, its SystemC modeling library, providing Tenstorrent with an open, Accellera-compatible modelling path and a commercial variant tuned for its simulation environment. Vayavya Labs used TvastaaVP to accelerate development while maintaining quality controls.
Most recently, Vayavya Labs delivered a phased release of Tenstorrent’s Open Chiplet Harness SEP virtual platform on two independent simulation targets and extended the platform with an additional system management controller and harness capabilities.
“Getting software and validation teams working against accurate models before silicon is available provides a meaningful advantage in this industry and a faster time to market. “It’s one of the primary reasons we’ve continued to deepen our work with Vayavya Labs,” said Aniket Saha, VP of Product Strategy, Tenstorrent.
“Tenstorrent is exactly the kind of production environment where agentic AI for virtual prototyping has to deliver production IP, demanding schedules, and high-quality bars,” said Sandeep Pendharkar, CTO & VP Engineering, Vayavya Labs. “What started as a single SystemC modeling engagement has grown into a multi-year partnership precisely because the models hold up under that pressure. As Tenstorrent’s RISC-V roadmap continues to expand, we see this as just the beginning of what virtual platforms can do for development velocity.”
Vayavya Labs and Tenstorrent will discuss this collaboration further at The Open Frontier, Tenstorrent’s RISC-V ecosystem event in Bengaluru on October 8, 2026, where Sandeep Pendharkar, CTO & VP Engineering at Vayavya Labs, will join the panel “Latest in RISC-V Products & Startups,” moderated by Tenstorrent’s Divyang Agrawal, VP of RISC-V Cores/IP.
